UART Protocol

UART framing, baud-rate generation, oversampling and VHDL implementation points.

What is UART?

UART (Universal Asynchronous Receiver/Transmitter) is an asynchronous serial protocol: unlike SPI and I2C, there is no shared clock between transmitter and receiver. Synchronization is achieved by a predefined communication rate called the baud rate (bits per second).

Key characteristics:

• Asynchronous: no shared clock
• Full-duplex: TX and RX are independent lines
• Point-to-point: 2 devices only (no multi-slave bus)
• Baud rate: both sides must be configured to the same rate

UART Signals

At rest, the TX line is high (logic '1', called "mark").

UART Frame

A standard UART frame (8N1 - 8 data bits, no parity, 1 stop bit):

1. Start bit: low level for 1 bit period - signals the beginning of the frame
2. Data bits: 5 to 9 bits, LSB first (standard convention)
3. Parity bit (optional): even, odd, or none
4. Stop bit(s): high level for 1 or 2 bit periods - end of frame

Baud Rate and Clock Divider

The baud rate determines bit duration: T_bit = 1 / baud_rate

To generate the baud rate from a system clock, calculate a divider:

DIVIDER = SYS_CLK / BAUD_RATE