4x8 Register File

Register file 4×8 bits with one synchronous write port and two independent asynchronous read ports, the canonical layout of a CPU register file.

Behaviour:

• Reset (i_reset='1'): all registers ← "00000000".
• Write: on the rising edge of i_clk, if i_we='1', i_wdata is stored at i_waddr.
• Read port 1: o_rdata1 ← contents of i_raddr1 (combinational).
• Read port 2: o_rdata2 ← contents of i_raddr2 (combinational).

*Allows reading two operands simultaneously in a single cycle. Asynchronous active-high reset.*