N-bit Counter with Overflow Output

Intermediate

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Specification

01General Operation

Synchronous counter of configurable width. Increments on rising edge when enable is active. Automatically wraps after maximum value and signals wrap-around.

Reset is asynchronous and active-high.

Generic g_WIDTH (default 8)
Ports use std_logic_vector

02Interface

i_clk

Direction: Input
Width: 1 bit
Description: System clock

i_reset

Direction: Input
Width: 1 bit
Description: Active-high async reset

i_en

Direction: Input
Width: 1 bit
Description: Counter enable

o_cpt

Direction: Output
Width: g_WIDTH bits
Description: Current counter value

o_max

Direction: Output
Width: 1 bit
Description: Maximum value indicator

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