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Sequence Reverser

Beginner

Simulate (GHDL)

00:00

Specification

01General Operation

The circuit is combinational: no internal state is required.

Behaviour

i_data[15:12] becomes the least significant nibble.
i_data[3:0] becomes the most significant nibble.
The output changes immediately with the input.

02Interface

i_data

Direction: Input
Width: 16 bits
Description: Input data

o_data

Direction: Output
Width: 16 bits
Description: Output data

← Fibonacci Generator