UART 8N1 Transmitter

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Specification

01General Operation

UART 8N1 transmitter: 1 start bit ('0'), 8 data bits (LSB first) and 1 stop bit ('1'). Baud rate is configurable via generics. The module signals availability through o_ready.

Reset is synchronous and active-high.

Generics g_clk_freq (default 100,000,000) and g_baud_rate (default 115,200)

02Interface

i_clk

Direction: Input
Width: 1 bit
Description: System clock

i_rst

Direction: Input
Width: 1 bit
Description: Synchronous reset active high

i_data

Direction: Input
Width: 8 bits
Description: Byte to transmit

i_valid

Direction: Input
Width: 1 bit
Description: Data valid

o_tx

Direction: Output
Width: 1 bit
Description: Serial TX line

o_ready

Direction: Output
Width: 1 bit
Description: Ready to accept a byte

← Full SPI Master (Configurable mode)Configurable Synchronous FIFO →

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