Logic Gates
Fundamental logic gates: AND, OR, NOT, NAND, NOR, XOR and their properties.
Introduction to Digital Logic
Digital logic operates on two levels: 0 (false, low, GND) and 1 (true, high, VCC).
A logic gate is an electronic circuit that performs a logical operation on one or more input bits to produce one output bit.
Fundamental Gates
NOT (Inverter)
| A | Y |
|---|---|
| 0 | 1 |
| 1 | 0 |
o_y <= NOT i_a;AND
| A | B | Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
o_y <= i_a AND i_b;OR
| A | B | Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
o_y <= i_a OR i_b;Derived Gates
NAND (NOT AND)
The universal gate - any logic function can be built using only NAND gates.
| A | B | Y = NOT(A AND B) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
o_y <= i_a NAND i_b;NOR (NOT OR)
Also universal.
| A | B | Y = NOT(A OR B) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
o_y <= i_a NOR i_b;XOR (Exclusive OR)
Outputs 1 only when the inputs are different.
| A | B | Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
o_y <= i_a XOR i_b;Common use: parity detection, 1-bit adder (sum).
XNOR (Exclusive NOR)
Outputs 1 when inputs are identical (1-bit comparator).
| A | B | Y |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
o_y <= i_a XNOR i_b;Equivalences
| Gate | NAND Equivalent | NOR Equivalent |
|---|---|---|
| NOT A | NAND(A, A) | NOR(A, A) |
| A AND B | NAND(NAND(A,B), NAND(A,B)) | - |
| A OR B | - | NOR(NOR(A,B), NOR(A,B)) |
Implementation on FPGA
On FPGAs, logic gates are not discrete physical components - they are implemented inside LUTs.
A LUT-6 can implement any combination of logic gates on up to 6 inputs. The synthesizer decides how to map your logical expression onto available LUTs.
-- This complex expression probably fits in 1 LUT
o_y <= (i_a AND i_b) OR (i_c XOR i_d) OR (NOT i_e);Half Adder and Full Adder
Half Adder
Sum = A XOR B
Carry = A AND Bo_sum <= i_a XOR i_b;
o_carry <= i_a AND i_b;Full Adder
Sum = A XOR B XOR Cin
Carry = (A AND B) OR (Cin AND (A XOR B))o_sum <= i_a XOR i_b XOR i_cin;
o_carry <= (i_a AND i_b) OR (i_cin AND (i_a XOR i_b));These blocks chain together to form an N-bit Ripple-Carry Adder.
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