W1C Register (Write-1-to-Clear)

Intermediate

00:00

Specification

01General Operation

Configurable-width Write-1-to-Clear (W1C) register, used for status registers. Writing '1' to a bit clears it, while external events can set bits. Clear has priority over set.

Reset is synchronous and active-low.

Generic g_DATA_WIDTH (default 8)
Rising-edge priority: reset > clear > set
Synchronous active-low reset

02Interface

i_clk

Direction: Input
Width: 1 bit
Description: System clock

i_rst_n

Direction: Input
Width: 1 bit
Description: Active-low synchronous reset

i_set_en

Direction: Input
Width: 1 bit
Description: Set enable

i_set_data

Direction: Input
Width: g_DATA_WIDTH bits
Description: Data to OR into register

i_clr_en

Direction: Input
Width: 1 bit
Description: Clear enable

i_clr_mask

Direction: Input
Width: g_DATA_WIDTH bits
Description: Clear mask (bits at '1' clear)

o_reg

Direction: Output
Width: g_DATA_WIDTH bits
Description: Current register value

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